Deterministic Execution on Many-Core Platforms: application to the SCC

TitleDeterministic Execution on Many-Core Platforms: application to the SCC
Publication TypeConference Paper
Year of Publication2011
Authorsd’Ausbourg, B, Boyer M, Noulard E, Pagetti C
EditorTröger, P, Polze A
Conference Name4th MARC Symposium
Date Published02/2012
PublisherTechnische Berichte des Hasso-Plattner-Instituts für Softwaresystemtechnik an der Universität Potsdam
Conference LocationPostdam, Germany
ISBN Number978-3-86956-169-1
Abstract

The last decade has seen the emergence of multicore architectures, i.e. chips integrating several cores. The forthcoming generation of hardware components will implement the many-core architecture: numerous cores communicating over a Network-on-Chip (NoC) technology.
The purpose of the paper is to overcome the main issues of those hardware platforms for executing safety critical embedded applications. Indeed, a many-core involves several non-predictable mechanisms which make it hard to determine the worst case behaviors. We propose to use a programming model which consists of a set of execution rules that reduce the non predictable behaviors. We illustrate our solution on the Intel SCC research processor.

URLhttp://www.dcl.hpi.uni-potsdam.de/research/scc/marc/marc2011.pdf